Test Pattern Generation for Transition Faults with Low Power using BS-LFSR and LOC
نویسندگان
چکیده
منابع مشابه
Implementation of Low Power Test Pattern Generator Using LFSR
In our project, we propose a novel architecture which generates the test patterns with reduced switching activities. LP-TPG (Test pattern Generator) structure consists of modified low power linear feedback shift register (LP-LFSR), m-bit counter; gray counter, NOR-gate structure and XOR-array. The m-bit counter is initialized with Zeros and which generates 2m test patterns in sequence. The m-bi...
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ژورنال
عنوان ژورنال: The SIJ Transactions on Computer Networks & Communication Engineering
سال: 2016
ISSN: 2321-239X,2321-2403
DOI: 10.9756/sijcnce/v4i5/0206160201